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envi-code/SourceCode/Code2026/ElecCmd/CCableRouting.h
T
2026-09-28 15:28:50 +08:00

233 lines
8.4 KiB
C++

#pragma once
#include "AecDbObjXDataMap.h"
#include "EarThwormDef.h"
/*
1. 强电优先路径
2. 弱电避开
3. 桥架填充率 + 已用路径 填埋电缆属性 !
4. 所有路径以颜色 和 属性 显示 可选路径
5. 敷设设置界面! 电缆等级 避让 填充率 等
6. 锁定电缆经过的 路径!
//https://elecdes.com/electrical-cad-software/paneldes-raceway-and-cable-routing-software
.Software algorithm for automated cable route optimisation, and calculation of cable length and fill.
.Filling optionally compliant with N.E.C.
.Override auto-routes by manually specifying an entire route or set "way-points" through which the conductor must pass.
.Override auto-routes by manually locking routes.
.User defined levels of cable power segregation and mixing.
.Project milestone based cable route issues are handled and managed. Design/ routing and installation can be overlapped for fast turnaround projects with the "ROUTED/ISSUED/PULLED" system.
This system provides milestone based "partial cable/route/fill schedules" which do not conflict as the installation progresses.
.Cable tray and conduit "Snug Fit" system optimises cable routing linearity and speed by intelligently and statistically optimising cable raceway intersections.
.Automated 3D cable route diagram with integral labelling and fill intelligence.
.Raceway network consistency checker. This highlights potential problems in an electrical raceway network.
.Parametric shapes for Areas, Enclosures, Devices, Instruments, Cable Tray, Cable Ladder, Trench, Conduit, Ductbank, Fittings, Accessories with Automated 3D SNAP.
.User defined 3D and 2D block options for visual accuracy.
.Automated model creation / device / instrument insertion from a database of components with their 3D locations.
.Automated "Ductbank Editor" is a tool to create and edit parallel arrays of conduit in concrete filled trenches.
.Automated "incremental" tag name defaulting - with user programmable tagnames!
.Automated selection of components from preliminary one lines and block diagrams AND final circuit diagrams.
.Database driven component sizing/block selection via Elecdes catalog databases [ODBC].
.Automated bill of materials and quantity summary.
.Component placement cross checks.
.Tag name duplication cross checks.
.Database driven global editor for changing tags, specs and sizes of multiple components in a single operation.
."Query" function provides fill and other details about the cable and the raceway segments.
*/
typedef struct CableData
{
double dD; //直径
double dV; //电压 0.xkv
TCHAR szSys[65];//系统,动力,控制,等
TCHAR szSpec[65];//型号
TCHAR szSect[9];//截面
double dLen; //Cal get
int nWeight; //强电 弱电 权重 0 -1 -2 ..
}CABLEDATA;
typedef struct CableSum
{
TCHAR szFr[256]; //起点设备
TCHAR szTo[256]; //终点设备
TCHAR szSpec[65];//电缆及规格
TCHAR szSect[9]; //截面
TCHAR szSys[65]; //电缆系统 排序用
double dOD; //外径
double dLen; //汇总长度
}CABLESUM;
typedef struct idPathStep
{
bool bSteped; //是否踩过
int nPoints; //确切的点 1 或 2
AcGePoint3d ptGe[2];//路径2点 最多
AcDbObjectId id; //
TCHAR szSys[65]; //系统,动力,控制,等
TCHAR szPathNo[21]; //句柄+[数字]
TCHAR szNo[33]; //桥架编号,可能不唯一,必须和 句柄组合
int bSpart; //是否分层
int nSysSplit; //如果分层,分层属性
double dSize[3]; //尺寸
bool bUseFillUsed; //是否使用填充率,路径,必经点不用
double dFillUsed; //已用的填充率 0~75%
bool bIsLockPath; //是否是锁定的路径
bool bIsPtPassby; //是否是必经过点
}IDPATHSTEP;
//AecDbDirPosition
typedef struct idLeadPort
{
AcGePoint3d m_ptPos;//接线位置
TCHAR szSys[65]; //系统,动力,控制,等
TCHAR szEquOn[256]; //关联设备
TCHAR szHd[17];//Handle
}IDLEADPORT;
typedef struct idPathSeg
{
AcDbObjectId id;
TCHAR szPathNo[21]; //句柄+[数字]
TCHAR szNo[33]; //桥架编号,可能不唯一,必须和 句柄组合
AcDbCurve *pLine;
double dSize[3];
}IDPATHSEG;
class AecDb3dRoadAxisLine;
class CableRoutePath
{
public:
CableRoutePath();
~CableRoutePath();
void SetCableData(const CableData &data);
Acad::ErrorStatus AppendCurveSeg(AcDbCurve *pCurve, const AcDbObjectId& id,double dSize[3], LPCTSTR pszPathNo = NULL);
AcDbCurve * getEndCurveSeg();
void removeLast();
void removeFirst();
bool isEmpty() { return m_arPathSegs.isEmpty(); }
Acad::ErrorStatus getStartPoint(AcGePoint3d &pt) const;
Acad::ErrorStatus getEndPoint(AcGePoint3d& pt) const;
double length() const;
void GetPathSteps(CString& sPathSteps) const;
Adesk::UInt16 colorIndex() const;
Acad::ErrorStatus setColorIndex(Adesk::UInt16 color);
Acad::ErrorStatus copyFrom(CableRoutePath* pPath);
AecDb3dRoadAxisLine *GetPathRoadAxLine() const;
bool Add2ModelSpace(LPCTSTR pszFr, LPCTSTR pszTo);
AcDbObjectId GetRoadAxLineId() const;
bool EraseRoadAxLine();
Acad::ErrorStatus SetFillUsed(AecDbObjXDataMap *pDataMap, AecHvac::DuctParam &param, const CableData &data) const;
Acad::ErrorStatus CalSetFillUsed(const CableData &data) const;
void DeleteAll();
bool HasLineSeg(const idPathStep & idps);
bool HasLineSeg(const AcGePoint3d &ptGe0, const AcGePoint3d &ptGe1);
bool IsPassByLockPath(const AcDbObjectIdArray& arIdsPassBy);
bool GetEndIdPathSeg(idPathSeg& idPs) const;
protected:
AcDbObjectId m_idRd;
CableData m_cabData;
int m_nColorIndex;
double m_dTol;
AcArray< idPathSeg > m_arPathSegs;
};
class CCableRouting
{
public:
CCableRouting();
~CCableRouting();
//设置配置
void SetBypassDis(double dBypassDis);
void SetPathOnPoint(double dPathOnPoint);
void SetEquFindDis(double dEquFindDis);
void SetIgoreFillUsed(bool bIgore);
void SetAssocNoorName(int nAssocNoorName);
//找到的路径 rPath为电缆路径 AecDb3dRoadAxisLine
bool SearchRouting(const AcDbObjectId &idFrom, const AcDbObjectId &idTo, CableData &data, int nPathUserPick,AcDbObjectId &rPath, CString &sPathSteps);
protected:
void GetEquPowerPoint(const AcDbObjectId &id, AcGePoint3d &pt, AcDbExtents &ext, const CableData &data);
bool FindEquCableEntryPoint(const AcDbObjectId &idEqu, AcGePoint3d &ptFrom, AcDbExtents &ext,AcDbObjectId &idEntryFr, AcGePoint3d &ptEntry);
bool GetEntryPath(const AcGePoint3d &ptFrEntry, const CableData &data, AcArray<CableRoutePath *> &arRoadAxLnPtrs);
bool CalRoutingPath(const AcGePoint3d &ptFrEntry, const AcGePoint3d &ptToEntry, const AcGePoint3d &ptFr, const AcGePoint3d &ptTo, const CableData &data, AcArray<CableRoutePath *> &ar3dRdAxLines);
void PreGetAllLeadPorts();
void PrepareLockPathData(const AcDbObjectId &idFrom, const AcDbObjectId &idTo, const CableData &data);
void PreparePolyPathData(const AcDbObjectId &idFrom, const AcDbObjectId &idTo, const CableData &data, bool bIgoreFillUsed /*= false*/);
void PrepareSetPathStepData(const CableData &data,bool bIgoreFillUsed = false);
bool GoOnRaceWay(CableRoutePath *pRd,const AcGePoint3d &ptToEntry, const AcGePoint3d &ptTo,const CableData &data, AcArray<CableRoutePath *> &arRoadAxLnPtrs);
void AddLPath(CableRoutePath *pRd, const AcGePoint3d &ptEnd, const AcGePoint3d &ptExit, int nOut = 1,LPCTSTR pszPathNo = NULL);
void CopyNRoadAxline(idPathStep &idps, int nSkip, CableRoutePath *pRd, AcArray<CableRoutePath *> &arNewRd);
bool IsNearToEndEntry(CableRoutePath *pRd, const AcGePoint3d &ptToEntry);
//是否接近锁定路径
bool GoOnLockPath(CableRoutePath *pRd);
int GetCableLayPos(const CableData &data, AecHvac::DuctParam &param);
void AddCableTrayStps(const CableData &data, const AcGePoint3d &ptS, const AcGePoint3d &ptE, AecHvac::DuctParam &param, AcDbObjectId &id, bool bIgoreFillUsed);
CableRoutePath * GetMinLenRdAxLine(AcArray<CableRoutePath *> &ar3dRdAxLines, AcGePoint3d &ptFrEntry, AcGePoint3d &ptToEntry, bool bDelete);
void RemoveInValidatePath(AcArray<CableRoutePath *> &ar3dRdAxLines);
void TestPaths(AcArray<CableRoutePath *> &ar3dRdAxLines, LPCTSTR pszFr, LPCTSTR pszTo);
void TestPathStepData();
bool IsGoRacewayExit(const AcGePoint3d &ptEnd, idPathStep &idps, AcGePoint3d &ptExit, const AcGePoint3d &ptToEntry);
bool IsPointDockPathStep(CableRoutePath *pRd,const AcGePoint3d &ptEnd, idPathStep &idps, int nPtPos);
bool Has2Way(const AcGePoint3d &ptEnd);
protected:
double m_dBypassDis; //路径搭桥最大间距
double m_dSpaceTol; //连接间距误差
double m_dPathOnPoint; //引出点距离误差
double m_dMaxextDis; //最大范围内找桥架或电缆沟
double m_dEquFindDis; //设备
//桥架缆沟所有的路径步集合
AcArray< idPathStep> m_arIdPthSteps;
//预埋路径线
AcArray< idPathStep> m_arIdPathBy;
//必经路径,锁定路径
AcDbObjectIdArray m_arIdsPassBy;
//引出点集合
AcArray< idLeadPort> m_arIdEquTerminal;
//桥架引出口
AcArray< idLeadPort> m_arRaceWayExit;
int m_nAssocNoorName;
bool m_bIgoreFillUsed;
};